marqs wrote:
...The PCB still needs 1-2 revisions before it can be considered release quality. Ideally it could be fitted inside CPS2 case with just one extra hole for HDMI connector. Board design files, gerbers, firmware etc. will all be freely available once the project is more mature. Below is a couple photos of the current prototype (click for bigger versions).
https://github.com/wifiber/cps2_digiav/tree/develI have forked the repository and made a few changes. I wanted the board to be a daughter-board that fit on top of the 24-pin DIPs in the CPS2 mainboard, and output the HDMI via a small cutout near the volume buttons. I also have moved all the larger ICs to the top of the board. This will allow the board to be assembled in my re-flow oven. With my OSSC experience, I found the surface tension of the solder could hold the SOT-23-5 voltage regulators and the small passive components, but nothing much bigger than that. I just finished layout and routing last night, so the silk screen (values, references) needs to be corrected. ALSO, I was forced to move the pin assignments for the 4-bit color (R,G,B,F) - this will require a change to the pin assignments in the FPGA (I know its a UCF file in Xilinx land, cant remember what Altera/Intel call it) I did leave the external clock and V/H sync pin assignments as they were, since those go to global clock lines on the FPGA.
I am planning on update the silk screen layer and modifying the code in the FPGA to take account of the new pin assignments. I wish I would have been paying closer attention to this thread as Marqs laid out some plans for part changes and improving the design, that I wish I would have rolled into my new layout. At any rate, I was going to finish this board up this week and decide if I should go ahead and make the board, or try and incorporate some of the part and design changes that Marqs recommended and hold off on making a board till all those component changes are complete.
Having the HDMI connector near the volume buttons wasn't my first choice, but it seemed like a decent compromise to have the PCB be a daughter board on the 24-pin DIPs, and I can also leverage a plastic post inside the CPS2 to provide some structural support for the PCB when HDMI cables are connected and removed.
https://imgur.com/a/il4zvThe 3D model is a bit misleading - the J1 J2 DIP packages are shown as ICs, these will be pin-headers in reality that mate with DIP sockets that will be piggy-backed on the 24 pin DIPs in the CPS2. Also the HDMI connector is missing, but easy to guess where it goes. I have measured my CPS2 A-board several times and THINK - I have the spacing correct for the J1/J2 DIPs and the strain relief hole in the bottom corner, and the HDMI connector - but if someone wants to double check my work - that would be super helpful.