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 Post subject: Circuit to properly combine HSYNC & VSYNC into 75ohm CSYNC?
PostPosted: Sat Aug 04, 2018 5:05 pm 


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Joined: 21 May 2013
Posts: 124
Hi all
I'm looking for a circuit design that can properly combine unbuffered HSYNC and VSYNC into buffered 75ohm CSYNC.

The main purpose is to replace the Dreamcast's stock CSYNC output so that it works in both 15kHz and 31kHz modes, but I would also like to use the same circuit in other consoles that have HSYNC and VSYNC internally available from the GPU/Video Encoder (Eventually I would just like to have all my 480p systems support analog RGBS output, so every system will be connected by either RGBS or HDMI)

I have searched everywhere and i'm really struggling to find a design that creates a *proper* 75ohm CSYNC signal from unbuffered HSYNC and VSYNC. Every design I have found so far just XNOR's HSYNC and VSYNC together. I really thought there would be an IC available to do this, but there doesnt appear to be anything(?) I suppose this is due to 31kHz RGBS being a non-standard output, but nowadays both the XRGB Mini and OSSC can support it.

Can anyone help put me in the right direction? (Or better yet design a circuit!) Thanks in advance for any help :)

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As to why I dont want to use any of the currently available designs available online which XNOR HSYNC and VSYNC together...

I am aware of the BeharBros Toro, but:-
Guspaz wrote:
It generates an invalid csync signal for the SCART port because it just XNORs the H and V sync together, which is incorrect and won't work properly with many digital devices like the OSSC.

viewtopic.php?f=6&t=61472
viewtopic.php?f=6&t=62611

In addition, regarding the designs available online:-
https://assemblergames.com/threads/how- ... ces.56493/
Calpis wrote:
Anyways, you can't easily make a real C sync signal from discrete H and V syncs. It would take a rather complicated circuit containing a PLL, CPLD and passive parts.

If you don't need a true C sync signal (can only be used on displays with robust sync reconstruction circuitry inside--otherwise you get distortion at the top of the screen), you simply need an XNOR gate and passives. The circuit linked above is an example of such, but isn't all that well designed; even with a low impedance outputs it's still technically off spec.

First it'd be better to use a 74HCT86 chip because then you can ditch the silly transistor output stages in exchange for a simple series 500-1k ohm resistor. A better output driver would be a couple of smaller resistors forming an impedance matched voltage divider, but it would require another less-common 5 V logic family with more output current and some resistor math I don't feel like doing now.

Calpis wrote:
For a sampling device like a HDMI converter, it'd really be best to use a real C sync signal, since the converter must cleanly separate H sync to generate the sampling clock. This cheap method of sync combining screws up the whole V sync portion of the signal, and will throw off the converter's sampling clock and HDMI output clock. The chip used in the converter will have a little resilience to this, but compatibility shouldn't be expected.


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Finally, in my searches I did note one interesting thing that doesn't seem to have been mentioned elsewhere.

The official Dreamcast VGA box circuit design has been posted online for some time:-
Image
However I believe this is incomplete...

As you can see it uses a 74HCT244 to buffer the HSYNC and VSYNC signals from the Dreamcast (The HSYNC/VSYNC come directly from the Dreamcast's HOLLY GPU to the AV port, and so are unbuffered and not protected without the 74HCT244) This chip is an octal line buffer which is apparently 'overkill' for its purpose:-
https://nfggames.com/forum2/index.php?t ... 27#msg7527

In the diagram above the chip is seperated into two 'blocks' even though its just one chip. The reason for this becomes clear if you look at the datasheet:-
https://assets.nexperia.com/documents/d ... HCT244.pdf
The 74HCT244 is basically just two 4-bit buffers put together in the same package, so the circuit design above is closer to the 74HCT244 'logic diagram' rather than the chip pinout as-is.

The curious thing is, if you look closely at the Dreamcast VGA box PCB in this post by Konsolkongen:-
viewtopic.php?p=867369#p867369
You can see the silkscreen has "C-SYNC" printed on it:-
Image
However the Dreamcast's stock CSYNC output (Pin 10) is not even present on the VGA boxes AV plug! So it would appear that the Sega designers originally intended for the Dreamcast VGA box to have CSYNC available from a combined HSYNC/VSYNC using a jumper position (JP1), but in the end they left off a small 5-leg component necessary for it to work.

My theory is that the HSYNC and VSYNC outputs from the 74HTC244 are fed back into the inputs via traces underneath the chip, which then would have been combined to produce CSYNC. This would explain why an octal buffer was chosen when only one half of the chip is currently used. Unfortunately I dont own an official Dreamcast VGA box so cant check this with a multimeter, but maybe someone here can confirm this theory?

If we could complete the original Sega design and identify the missing 5-legged component that could great, but perhaps someone could even improve upon it?


Last edited by Link83 on Sun Aug 05, 2018 11:27 pm, edited 1 time in total.

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 Post subject: Re: Circuit to properly combine HSYNC & VSYNC into 75ohm CSY
PostPosted: Sun Aug 05, 2018 6:13 pm 



Joined: 08 Mar 2017
Posts: 471
Usually people want to descramble CSYNC back into proper H/V Sync, so your request is somewhat rare :p

Calpis probably wasn't talking about the signal levels and termination alone.
A to-spec CSYNC signal has to have equalization pulses around and within the VSYNC pulse.
Those are HSYNC pulses at doubled frequency (hence probably the need for a PLL).
It's confusing stuff, so I'll link you to the best explanation site I know at the moment:
http://www.batsocks.co.uk/readme/video_timing.htm

There may exist a chip for this, but the task is specialised and outdated.
It's got to be pretty much an "NTSC CSYNC generator IC".

But you can probably get away with the simple sync combiner.
I haven't looked at it but even the simple solution should keep the HSYNC pulses going while in VSYNC.
Of course, they'll have to be inverted then. Can't have both pulses be active low at the same time ;p
Edit: XNOR is correct for this.


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 Post subject: Re: Circuit to properly combine HSYNC & VSYNC into 75ohm CSY
PostPosted: Sun Aug 05, 2018 6:22 pm 



Joined: 24 Jul 2016
Posts: 89
I just use viletim's circuit: http://members.optusnet.com.au/eviltim/scart.htm

Double check with a scope under load that it's the right voltage. If not, use a series resistor at the end to drop the voltage down to desired levels (I like to go for 0.3vpp for 75 Ohm sync, but anything from 0.1vpp to 1vpp should be within spec). I use an Extron Crosspoint myself, so I don't need to worry about proper voltage levels.

The Dodgy Diode Circuit works fine for me, but you may need the more advanced one depending on your TV.


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 Post subject: Re: Circuit to properly combine HSYNC & VSYNC into 75ohm CSY
PostPosted: Mon Aug 06, 2018 1:56 am 



Joined: 01 Jul 2017
Posts: 26
viletim's circuit works well but is a simple XNOR gate that inverts the HSYNC signal during the VSYNC (plus some extra logic to guarantee correct output polarity regardless on the input polarity). The problem is that it skews the HSYNC phase during VSYNC and will cause pickier hardware, such as BVMs, to lose AFC PLL lock.

For one of my projects, I used a microcontroller to measure the HYSNC period and to simply extend the length of the HSYNC pulse during the VSYNC period while preserving the correct falling edge timing. It's missing the equalization pulses and needs some extra work for interlaced mode but is enough to keep the AFC lock happy for progressive video.


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 Post subject: Re: Circuit to properly combine HSYNC & VSYNC into 75ohm CSY
PostPosted: Mon Aug 06, 2018 2:26 am 


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Joined: 20 Aug 2016
Posts: 887
Do the Extron RGB units do this properly--or are there some anomalies with those as well?
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 Post subject: Re: Circuit to properly combine HSYNC & VSYNC into 75ohm CSY
PostPosted: Thu Aug 09, 2018 12:53 pm 



Joined: 07 Aug 2006
Posts: 469
Location: Sydney, Australia
Link83,

Here's a sync combiner circuit for Dreamcast VGA. I've been meaning to make one for myself for a while and did just that yesterday. It makes use of a RC timer IC to stretch out the H-sync pulse during the vertical period. So it's not a generic circuit, it works for Dreamcast VGA timing only. The document contains 3.3V and 5V power versions of the same circuit.

Image
The yellow trace is the horizontal input and the cyan trace is the composite sync out. All the falling edges line up as expected during during vertical sync.

I made it from parts I had at hand only just realised when entering the schematic that the 74HC123N made by NXP is obsolete now. The next time I order from Element 14 I'll buy the substitute TI CD74HC123E and work out the correct timing resistors for it.


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 Post subject: Re: Circuit to properly combine HSYNC & VSYNC into 75ohm CSY
PostPosted: Thu Aug 09, 2018 4:15 pm 



Joined: 21 Aug 2016
Posts: 324
Toro works just fine with the OSSC, at least on my setup. Both RGB and VGA modes going through a SCART cable into a gscartsw_lite into the OSSC. I do not have sync regen turned on. Maybe it's not "proper," but it does work.


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